A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time

Moo-young Kim, Dongsuk Shin, Hyunsoo Chae, Chulwoo Kim. A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time. IEEE Trans. VLSI Syst., 17(10):1461-1469, 2009. [doi]

Authors

Moo-young Kim

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Dongsuk Shin

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Hyunsoo Chae

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Chulwoo Kim

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