A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time

Moo-young Kim, Dongsuk Shin, Hyunsoo Chae, Chulwoo Kim. A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time. IEEE Trans. VLSI Syst., 17(10):1461-1469, 2009. [doi]

@article{KimSCK09,
  title = {A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time},
  author = {Moo-young Kim and Dongsuk Shin and Hyunsoo Chae and Chulwoo Kim},
  year = {2009},
  doi = {10.1109/TVLSI.2008.2004591},
  url = {http://dx.doi.org/10.1109/TVLSI.2008.2004591},
  tags = {source-to-source, open-source},
  researchr = {https://researchr.org/publication/KimSCK09},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {17},
  number = {10},
  pages = {1461-1469},
}