A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time

Moo-young Kim, Dongsuk Shin, Hyunsoo Chae, Chulwoo Kim. A Low-Jitter Open-Loop All-Digital Clock Generator With Two-Cycle Lock-Time. IEEE Trans. VLSI Syst., 17(10):1461-1469, 2009. [doi]

Abstract

Abstract is missing.