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Smita Krishnaswamy, Igor L. Markov, John P. Hayes. Tracking Uncertainty with Probabilistic Logic Circuit Testing. IEEE Design & Test of Computers, 24(4):312-321, 2007. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Balance Testing of Logic CircuitsKrishnendu Chakrabarty, John P. Hayes. ftcs 1993: 350-359 Cumulative balance testing of logic circuitsKrishnendu Chakrabarty, John P. Hayes. tvlsi, 3(1):72-83, 1995. [doi]
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