Dae Hyun Kwon, Minkyu Kim, Sung-Geun Kim, Woo-Young Choi. A 32-Gb/s PAM-4 Quarter-Rate Clock and Data Recovery Circuit With an Input Slew-Rate Tolerant Selective Transition Detector. IEEE Trans. on Circuits and Systems, 66(2):362-366, 2019. [doi]
Abstract is missing.