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Yen-Long Lee, Soon-Jyh Chang. A quick jitter tolerance estimation technique for bang-bang CDRs. In International Test Conference in Asia, ITC-Asia 2017, Taipei, Taiwan, September 13-15, 2017. pages 8-13, IEEE, 2017. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A Fast and Jitter-Modulation Free Jitter Tolerance Estimation Technique for Bang- Bang CDRsYen-Long Lee, Yu-Po Cheng, Soon-Jyh Chang, Hsin-Wen Ting. dt, 35(1):63-73, 2018. [doi] On-chip jitter tolerance measurement technique for CDR circuitsKyung-Sub Son, Kyongsu Lee, Jin-Ku Kang. iscas 2015: 1602-1605 [doi]
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