The following publications are possibly variants of this publication:
- ESD protection design for wideband RF applications in 65-nm CMOS processLi-Wei Chu, Chun-Yu Lin, Ming-Dou Ker, Ming-Hsiang Song, Jeng-Chou Tseng, Chewnpu Jou, Ming-Hsien Tsai. iscas 2014: 1480-1483 [doi]
- ESD protection design for CMOS RF integrated circuits using polysilicon diodesMing-Dou Ker, Chyh-Yih Chang. mr, 42(6):863-872, 2002. [doi]
- On the Design of Power-rail ESD Clamp Circuit with Consideration of Gate Leakage Current in 65-nm Low-voltage CMOS ProcessMing-Dou Ker, Po-Yen Chiu, Fu-Yi Tsai, Yeong-Jar Chang. iscas 2009: 2281-2284 [doi]
- ESD Protection Design for Mixed-Voltage I/O Circuit with Substrate-Triggered Technique in Sub-Quarter-Micron CMOS ProcessMing-Dou Ker, Chien-Hui Chuang, Kuo-Chun Hsu, Wen-Yu Lo. isqed 2002: 331-336 [doi]
- On-chip ESD protection circuit design with novel substrate-triggered SCR device in sub-quarter-micron CMOS processMing-Dou Ker, Kuo-Chun Hsu. iscas 2002: 529-532 [doi]
- Design to Avoid the Over-Gate-Driven Effect on ESD Protection Circuits in Deep-Submicron CMOS ProcessesMing-Dou Ker, Wen-Yi Chen. isqed 2004: 445-450 [doi]
- Impedance-Isolation Technique for ESD Protection Design in RF Integrated CircuitsMing-Dou Ker, Yuan-Wen Hsiao. ieicet, 92-C(3):341-351, 2009. [doi]
- Compact and low-loss ESD protection design for V-band RF applications in a 65-nm CMOS technologyLi-Wei Chu, Chun-Yu Lin, Shiang-Yu Tsai, Ming-Dou Ker, Ming-Hsiang Song, Chewnpu Jou, Tse-Hua Lu, Jeng-Chou Tseng, Ming-Hsien Tsai, Tsun-Lai Hsu, Ping-Fang Hung, Tzu-Heng Chang. iscas 2012: 2127-2130 [doi]
- Modified LC-tank ESD protection design for 60-GHz RF applicationsChun-Yu Lin, Li-Wei Chu, Shiang-Yu Tsai, Ming-Dou Ker, Tse-Hua Lu, Tsun-Lai Hsu, Ping-Fang Hung, Ming-Hsiang Song, Jeng-Chou Tseng, Tzu-Heng Chang, Ming-Hsien Tsai. ecctd 2011: 57-60 [doi]
- Active ESD protection circuit design against charged-device-model ESD event in CMOS integrated circuitsShih-Hung Chen, Ming-Dou Ker. mr, 47(9-11):1502-1505, 2007. [doi]