2 718GOPS configurable spiking convolutional sparse coding processor in 40nm CMOS

Chester Liu, Sung-gun Cho, Zhengya Zhang. 2 718GOPS configurable spiking convolutional sparse coding processor in 40nm CMOS. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2017, Seoul, Korea (South), November 6-8, 2017. pages 233-236, IEEE, 2017. [doi]

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