A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation

Dinh Van Luan, Xuan Truong Nguyen, Hyuk-Jae Lee. A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation. TRETS, 12(2), 2019. [doi]

Authors

Dinh Van Luan

This author has not been identified. Look up 'Dinh Van Luan' in Google

Xuan Truong Nguyen

This author has not been identified. Look up 'Xuan Truong Nguyen' in Google

Hyuk-Jae Lee

This author has not been identified. Look up 'Hyuk-Jae Lee' in Google