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Dinh Van Luan, Xuan Truong Nguyen, Hyuk-Jae Lee. A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation. TRETS, 12(2), 2019. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A novel run-time auto-reconfigurable FPGA architecture for fast fault recovery with backward compatibility (abstract only)Hasan Baig, Jeong-A. Lee. fpga 2013: 270 [doi] A New FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation of Operating Condition VariationDinh Van Luan, Xuan Truong Nguyen, Hyuk-Jae Lee. iscas 2018: 1-4 [doi]
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