A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation

Dinh Van Luan, Xuan Truong Nguyen, Hyuk-Jae Lee. A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation. TRETS, 12(2), 2019. [doi]

@article{LuanNL19,
  title = {A Novel FPGA Implementation of a Time-to-Digital Converter Supporting Run-Time Estimation and Compensation},
  author = {Dinh Van Luan and Xuan Truong Nguyen and Hyuk-Jae Lee},
  year = {2019},
  doi = {10.1145/3322482},
  url = {https://doi.org/10.1145/3322482},
  researchr = {https://researchr.org/publication/LuanNL19},
  cites = {0},
  citedby = {0},
  journal = {TRETS},
  volume = {12},
  number = {2},
}