A DFT Selection Method for Reducing Test Application Time of System-on-Chips

Masahide Miyazaki, Toshinori Hosokawa, Hiroshi Date, Michiaki Muraoka, Hideo Fujiwara. A DFT Selection Method for Reducing Test Application Time of System-on-Chips. IEICE Transactions, 87-D(3):609-619, 2004. [doi]

@article{MiyazakiHDMF04,
  title = {A DFT Selection Method for Reducing Test Application Time of System-on-Chips},
  author = {Masahide Miyazaki and Toshinori Hosokawa and Hiroshi Date and Michiaki Muraoka and Hideo Fujiwara},
  year = {2004},
  url = {http://search.ieice.org/bin/summary.php?id=e87-d_3_609},
  tags = {testing},
  researchr = {https://researchr.org/publication/MiyazakiHDMF04},
  cites = {0},
  citedby = {0},
  journal = {IEICE Transactions},
  volume = {87-D},
  number = {3},
  pages = {609-619},
}