Unified Logical Effort - A Method for Delay Evaluation and Minimization in Logic Paths With RC Interconnect - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Arkadiy Morgenshtein, Eby G. Friedman, Ran Ginosar, Avinoam Kolodny. Unified Logical Effort - A Method for Delay Evaluation and Minimization in Logic Paths With RC Interconnect. IEEE Trans. VLSI Syst., 18(5):689-696, 2010. [doi]

This author has not been identified. Look up 'Arkadiy Morgenshtein' in GoogleThis author has not been identified. Look up 'Eby G. Friedman' in GoogleThis author has not been identified. Look up 'Ran Ginosar' in GoogleThis author has not been identified. Look up 'Avinoam Kolodny' in Google

runs on WebDSL