Researchr is a web site for finding, collecting, sharing, and reviewing scientific publications, for researchers by researchers.
Sign up for an account to create a profile with publication list, tag and review your related work, and share bibliographies with your co-authors.
Arkadiy Morgenshtein, Eby G. Friedman, Ran Ginosar, Avinoam Kolodny. Unified Logical Effort - A Method for Delay Evaluation and Minimization in Logic Paths With RC Interconnect. IEEE Trans. VLSI Syst., 18(5):689-696, 2010. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Corrections to Unified Logical Effort - A Method for Delay Evaluation and Minimization in Logic Paths With RC Interconnect [May 10 689-696]Arkadiy Morgenshtein, Eby G. Friedman, Ran Ginosar, Avinoam Kolodny. tvlsi, 18(8):1262, 2010. [doi]
The following publications are possibly variants of this publication: