A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit configurable macrocells

Hiroki Morimura, Satoshi Shigematsu, Shinsuke Konaka. A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit configurable macrocells. In Farid N. Najm, Jason Cong, David Blaauw, editors, Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999, San Diego, California, USA, August 16-17, 1999. pages 12-17, ACM, 1999. [doi]

Abstract

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