Hiroki Morimura - researchr alias

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Viewing Publication 1 - 28 from 28

2019

A 0.90-4.39-V Detection Voltage Range, 56-Level Programmable Voltage Detector Using Fine Voltage-Step Subtraction for Battery ManagementTeruki Someya, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya. tcas, 66-I(3):1270-1279, 2019. [doi]

2017

Analysis and Experimental Study of Magnetic-Field Amplification by a Double CoilAi-ichiro Sasaki, Olivier Ouellette, Maxime Beaudry-Marchand, Akihiko Hirata, Hiroki Morimura. tie, 64(4):3216-3226, 2017. [doi]

Design and Analysis of Ultra-Low Power Glitch-Free Programmable Voltage Detector Based on Multiple Voltage CopierTeruki Someya, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya. ieicet, 100-C(4):349-358, 2017. [doi]

2016

56-Level programmable voltage detector in steps of 50mV for battery managementTeruki Someya, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya. asscc 2016: 49-52 [doi]

2015

Analysis to optimize sensitivity of RF energy harvester with voltage boost circuitDan Luo, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Makoto Takamiya, Takayasu Sakurai. ecctd 2015: 1-4 [doi]

A Wide Frequency PLL-less Clock Generator with Fast Intermittent Operation for Low-Power Wearable Medical ApplicationsAhmed Musa, Tadashi Minotani, Toshihiko Kondo, Hiroki Morimura. apcc 2015: 662-665 [doi]

An 8-mode reconfigurable sensor-independent readout circuit for trillion sensors eraAhmed Musa, Tadashi Minotani, Kenichi Matsunaga, Toshihiko Kondo, Hiroki Morimura. issnip 2015: 1-6 [doi]

248pW, 0.11mV/°C glitch-free programmable voltage detector with multiple voltage duplicator for energy harvestingTeruki Someya, Hiroshi Fuketa, Kenichi Matsunaga, Hiroki Morimura, Takayasu Sakurai, Makoto Takamiya. esscirc 2015: 249-252 [doi]

2014

Ultra-low-power circuit techniques for mm-size wireless sensor nodes with energy harvestingHiroki Morimura, Shoichi Oshima, Kenichi Matsunaga, Toshishige Shimamura, Mitsuru Harada. ieiceee, 11(20):20142009, 2014. [doi]

Increase in Read Noise Margin of Single-Bit-Line SRAM Using Adiabatic Change of Word Line VoltageShunji Nakata, Hiroki Hanazono, Hiroshi Makino, Hiroki Morimura, Masayuki Miyama, Yoshio Matsuda. tvlsi, 22(3):686-690, 2014. [doi]

2012

Energy dissipation reduction during adiabatic charging and discharging with controlled inductor currentShunji Nakata, Ryota Honda, Hiroshi Makino, Hiroki Morimura, Yoshio Matsuda. mwscas 2012: 1068-1071 [doi]

3 event-driven wireless sensor nodesShoichi Oshima, Kenichi Matsunaga, Toshishige Shimamura, Hiroki Morimura, Mitsuru Harada. iccoms 2012: 6-10 [doi]

2010

Capacitive-Sensing Circuit Technique for Image Quality Improvement on Fingerprint Sensor LSIsToshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Mamoru Nakanishi, Katsuyuki Machida. jssc, 45(5):1080-1087, 2010. [doi]

Nano-watt power management and vibration sensing on a dust-size batteryless sensor node for ambient intelligence applicationsToshishige Shimamura, Mamoru Ugajin, Kenji Suzuki, Kazuyoshi Ono, Norio Sato, Kei Kuwabara, Hiroki Morimura, Shin'ichiro Mutoh. isscc 2010: 504-505 [doi]

2008

A Fingerprint Sensor with Impedance Sensing for Fraud DetectionToshishige Shimamura, Hiroki Morimura, Nobuhiro Shimoyama, Tomomi Sakata, Satoshi Shigematsu, Katsuyuki Machida, Mamoru Nakanishi. isscc 2008: 170-171 [doi]

2007

Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSISatoshi Shigematsu, Hiroki Morimura, Toshishige Shimamura, Takahiro Hatano, Namiko Ikeda, Yukio Okazaki, Katsuyuki Machida, Mamoru Nakanishi. ieicet, 90-C(10):1892-1899, 2007. [doi]

2006

Fingerprint Image Enhancement and Rotation Schemes for a Single-Chip Fingerprint Sensor and IdentifierSatoshi Shigematsu, Koji Fujii, Hiroki Morimura, Takahiro Hatano, Mamoru Nakanishi, Namiko Ikeda, Toshishige Shimamura, Katsuyuki Machida, Yukio Okazaki, Hakaru Kyuragi. ieicet, 89-C(4):540-550, 2006. [doi]

2005

Pixel-Parallel Image-Matching Circuit Schemes for a Single-Chip Fingerprint Sensor and IdentifierSatoshi Shigematsu, Hiroki Morimura, Katsuyuki Machida, Yukio Okazaki, Hakaru Kyuragi. ieicet, 88-C(5):1070-1078, 2005. [doi]

2002

2000

A novel sensor cell architecture and sensing circuit scheme for capacitive fingerprint sensorsHiroki Morimura, Satoshi Shigematsu, Katsuyuki Machida. jssc, 35(5):724-731, 2000. [doi]

1-V 100-MHz embedded SRAM techniques for battery-operated MTCMOS/SIMOX ASICsNobutaro Shibata, Hiroki Morimura, Mitsuru Harada. jssc, 35(10):1396-1407, 2000. [doi]

1999

1998

A step-down boosted-wordline scheme for 1-V battery-operated fast SRAM'sHiroki Morimura, Nobutaro Shibata. jssc, 33(8):1220-1227, 1998. [doi]

1996

A 1-V 1-Mb SRAM for portable equipmentHiroki Morimura, Nobutaro Shibata. islped 1996: 61-66 [doi]

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1996

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