Satoshi Shigematsu - researchr alias

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Viewing Publication 1 - 34 from 34

2020

Hierarchical Scheduling with FPGA-based Accelerator for Flexible 5G Mobile NetworksYuki Arikawa, Takeshi Sakamoto, Satoshi Shigematsu. vtc 2020: 1-5 [doi]

Miniature Optical Connector with Magnetic Physical ContactKota Shikama, Norio Sato, Atsushi Aratake, Satoshi Shigematsu, Takeshi Sakamoto. ofc 2020: 1-3 [doi]

2019

2018

Throughput Enhancement with Hardware Accelerated Resource Scheduler in Low-Latency 5G SystemsYuki Arikawa, Takeshi Sakamoto, Shunji Kimura, Satoshi Shigematsu. pimrc 2018: 1-6 [doi]

Contention-Less Scheduling-Free Torus Optical Network Comprising Thousands of NodesSalah Ibrahim, Toshikazu Hashimoto, Satoshi Shigematsu. ecoc 2018: 1-3 [doi]

2017

A 100-MHz 51.2-Gb/s Packet Lookup Engine with Automatic Table Update FunctionKousuke Imamura, Ryota Honda, Yoshifumi Kawamura, Naoki Miura, Masami Urano, Satoshi Shigematsu, Tetsuya Matsumura, Yoshio Matsuda. ieicet, 100-A(10):2123-2134, 2017. [doi]

2016

High-speed radio-resource scheduling for 5G ultra-high-density distributed antenna systemsYuki Arikawa, Hiroyuki Uzawa, Takeshi Sakamoto, Satoshi Shigematsu. wcsp 2016: 1-5 [doi]

2015

Practical resource scheduling in massive-cell deployment for 5G mobile communications systemsYuki Arikawa, Kenji Kawai, Hiroyuki Uzawa, Satoshi Shigematsu. ispacs 2015: 456-461 [doi]

A 100-MHz 51.2-Gb/s packet lookup engine LSI based on missmatch detection circuit combined with linked-list hash tableYoshifumi Kawamura, Kousuke Imamura, Naoki Miura, Masami Urano, Satoshi Shigematsu, Yoshio Matsuda. ispacs 2015: 351-356 [doi]

Software-Hardware-Cooperative Protocol Processor for Extendable 10G-EPON MAC ChipNaoki Miura, Akihiko Miyazaki, Junichi Kato, Nobuyuki Tanaka, Satoshi Shigematsu, Masami Urano, Mamoru Nakanishi, Tsugumichi Shibata. ieicet, 98-C(1):45-52, 2015. [doi]

High-speed sorted-table search scheme for network processingHiroyuki Uzawa, Kazuhiko Terada, Namiko Ikeda, Satoshi Shigematsu. apcc 2015: 616-620 [doi]

Data transmission scheme for enhancing effective downlink bandwidth in 5G mobile fronthaul with TDM-PONHiroyuki Uzawa, Yuki Arikawa, Kenji Kawai, Satoshi Shigematsu. ecoc 2015: 1-3 [doi]

2014

Area-efficient dynamically reconfigurable protocol-processing-hardware for access network communications SoCSaki Hatta, Nobuyuki Tanaka, Satoshi Shigematsu. reconfig 2014: 1-6 [doi]

A novel DBA scheme for TDM-PON based mobile fronthaulTakayoshi Tashiro, Shigeru Kuwano, Jun Terada, Tomoaki Kawamura, Nobuyuki Tanaka, Satoshi Shigematsu, Naoto Yoshimoto. ofc 2014: 1-3 [doi]

2012

Wire-speed verification schemes for HW/SW design of 10-Gbit/s-class large-scale NW SoC using multiple FPGAsKazuhiko Terada, Hiroyuki Uzawa, Namiko Ikeda, Satoshi Shigematsu, Nobuyuki Tanaka, Masami Urano. fpl 2012: 639-642 [doi]

Introduction to the Special Issue on the 2011 IEEE International Solid-State Circuits ConferenceAlice Wang, Ken Takeuchi, Tanay Karnik, Maysam Ghovanloo, Satoshi Shigematsu. jssc, 47(1):3-7, 2012. [doi]

2010

Fusion of MEMS and circuitsSatoshi Shigematsu, Kazutami Arimoto, Christoph Hagleitner. isscc 2010: 526-527 [doi]

Capacitive-Sensing Circuit Technique for Image Quality Improvement on Fingerprint Sensor LSIsToshishige Shimamura, Hiroki Morimura, Satoshi Shigematsu, Mamoru Nakanishi, Katsuyuki Machida. jssc, 45(5):1080-1087, 2010. [doi]

2008

A Fingerprint Sensor with Impedance Sensing for Fraud DetectionToshishige Shimamura, Hiroki Morimura, Nobuhiro Shimoyama, Tomomi Sakata, Satoshi Shigematsu, Katsuyuki Machida, Mamoru Nakanishi. isscc 2008: 170-171 [doi]

2007

Logic and Analog Test Schemes for a Single-Chip Pixel-Parallel Fingerprint Identification LSISatoshi Shigematsu, Hiroki Morimura, Toshishige Shimamura, Takahiro Hatano, Namiko Ikeda, Yukio Okazaki, Katsuyuki Machida, Mamoru Nakanishi. ieicet, 90-C(10):1892-1899, 2007. [doi]

2006

Fingerprint Image Enhancement and Rotation Schemes for a Single-Chip Fingerprint Sensor and IdentifierSatoshi Shigematsu, Koji Fujii, Hiroki Morimura, Takahiro Hatano, Mamoru Nakanishi, Namiko Ikeda, Toshishige Shimamura, Katsuyuki Machida, Yukio Okazaki, Hakaru Kyuragi. ieicet, 89-C(4):540-550, 2006. [doi]

2005

Pixel-Parallel Image-Matching Circuit Schemes for a Single-Chip Fingerprint Sensor and IdentifierSatoshi Shigematsu, Hiroki Morimura, Katsuyuki Machida, Yukio Okazaki, Hakaru Kyuragi. ieicet, 88-C(5):1070-1078, 2005. [doi]

2002

A 500-dpi cellular-logic processing array for fingerprint-image enhancement and verificationKoji Fujii, Mamoru Nakanishi, Satoshi Shigematsu, Hiroki Morimura, Takahiro Hatano, Namiko Ikeda, Toshishige Shimamura, Yukio Okazaki, Hakaru Kyuragi. cicc 2002: 261-264 [doi]

A Fingerprint Verification Algorithm Using the Differential Matching RateTakahiro Hatano, Takuya Adachi, Satoshi Shigematsu, Hiroki Morimura, Shigehiko Onishi, Yukio Okazaki, Hakaru Kyuragi. icpr 2002: 799-802 [doi]

Fingerprint Image Enhancement by Pixel-Parallel ProcessingNamiko Ikeda, Mamoru Nakanishi, Koji Fujii, Takahiro Hatano, Satoshi Shigematsu, Takuya Adachi, Yukio Okazaki, Hakaru Kyuragi. icpr 2002: 752-755 [doi]

A pixel-level automatic calibration circuit scheme for capacitive fingerprint sensor LSIsHiroki Morimura, Satoshi Shigematsu, Toshishige Shimamura, Katsuyuki Machida, Hakaru Kyuragi. jssc, 37(10):1300-1306, 2002. [doi]

2000

A novel sensor cell architecture and sensing circuit scheme for capacitive fingerprint sensorsHiroki Morimura, Satoshi Shigematsu, Katsuyuki Machida. jssc, 35(5):724-731, 2000. [doi]

1999

1997

A 0.5-V MTCMOS/SIMOX logic gateTakakuni Douseki, Satoshi Shigematsu, Junzo Yamada, Mitsuru Harada, Hiroshi Inokawa, Toshiaki Tsuchiya. jssc, 32(10):1604-1609, 1997. [doi]

A 1-V high-speed MTCMOS circuit scheme for power-down application circuitsSatoshi Shigematsu, Shin'ichiro Mutoh, Yasuyuki Matsuya, Yasuyuki Tanabe, Junzo Yamada. jssc, 32(6):861-869, 1997. [doi]

1995

1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOSShin'ichiro Mutoh, Takakuni Douseki, Yasuyuki Matsuya, Takahko Aoki, Satoshi Shigematsu, Junzo Yamada. jssc, 30(8):847-854, August 1995. [doi]

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