A 1-V high-speed MTCMOS circuit scheme for power-down application circuits

Satoshi Shigematsu, Shin'ichiro Mutoh, Yasuyuki Matsuya, Yasuyuki Tanabe, Junzo Yamada. A 1-V high-speed MTCMOS circuit scheme for power-down application circuits. J. Solid-State Circuits, 32(6):861-869, 1997. [doi]

Abstract

Abstract is missing.