Satoshi Shigematsu, Shin'ichiro Mutoh, Yasuyuki Matsuya, Yasuyuki Tanabe, Junzo Yamada. A 1-V high-speed MTCMOS circuit scheme for power-down application circuits. J. Solid-State Circuits, 32(6):861-869, 1997. [doi]
@article{ShigematsuMMTY97,
title = {A 1-V high-speed MTCMOS circuit scheme for power-down application circuits},
author = {Satoshi Shigematsu and Shin'ichiro Mutoh and Yasuyuki Matsuya and Yasuyuki Tanabe and Junzo Yamada},
year = {1997},
doi = {10.1109/4.585288},
url = {https://doi.org/10.1109/4.585288},
researchr = {https://researchr.org/publication/ShigematsuMMTY97},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {32},
number = {6},
pages = {861-869},
}