0.4V SRAM with bit line swing suppression charge share hierarchical bit line scheme - researchr publication

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Shinichi Moriwaki, Atsushi Kawasumi, Toshikazu Suzuki, Takayasu Sakurai, Shinji Miyano. 0.4V SRAM with bit line swing suppression charge share hierarchical bit line scheme. In Rakesh Patel, Tom Andre, Aurangzeb Khan, editors, 2011 IEEE Custom Integrated Circuits Conference, CICC 2011, San Jose, CA, USA, Sept. 19-21, 2011. pages 1-4, IEEE, 2011. [doi]

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