Automatic synthesis of gate-level timed circuits with choice

Chris J. Myers, Tomas Rokicki, Teresa H. Y. Meng. Automatic synthesis of gate-level timed circuits with choice. In 16th Conference on Advanced Research in VLSI (ARVLSI 95), March 27-29, 1995, Chapel Hill, North Carolina, USA. pages 42-58, IEEE Computer Society, 1995. [doi]

Abstract

Abstract is missing.