A DFT Technique for Testing High-Speed Circuits with Arbitrarily Slow Testers

Muhammad Nummer, Manoj Sachdev. A DFT Technique for Testing High-Speed Circuits with Arbitrarily Slow Testers. J. Electronic Testing, 19(3):299-314, 2003. [doi]

Authors

Muhammad Nummer

This author has not been identified. Look up 'Muhammad Nummer' in Google

Manoj Sachdev

This author has not been identified. Look up 'Manoj Sachdev' in Google