Muhammad Nummer, Manoj Sachdev. A DFT Technique for Testing High-Speed Circuits with Arbitrarily Slow Testers. J. Electronic Testing, 19(3):299-314, 2003. [doi]
@article{NummerS03:1,
title = {A DFT Technique for Testing High-Speed Circuits with Arbitrarily Slow Testers},
author = {Muhammad Nummer and Manoj Sachdev},
year = {2003},
doi = {10.1023/A:1023753231177},
url = {http://dx.doi.org/10.1023/A:1023753231177},
tags = {testing},
researchr = {https://researchr.org/publication/NummerS03%3A1},
cites = {0},
citedby = {0},
journal = {J. Electronic Testing},
volume = {19},
number = {3},
pages = {299-314},
}