The following publications are possibly variants of this publication:
- A High-Speed Low-Complexity Time-Multiplexing Reed-Solomon-Based FEC Architecture for Optical CommunicationsJeong-In Park, Hanho Lee. ieicet, 95-A(12):2424-2429, 2012. [doi]
- High-speed VLSI architecture for parallel Reed-Solomon decoderHanho Lee. tvlsi, 11(2):288-294, 2003. [doi]
- High-speed VLSI architecture for parallel Reed-Solomon decoderHanho Lee. iscas 2003: 320-323 [doi]
- Two-parallel Reed-Solomon based FEC architecture for optical communicationsSeungbeom Lee, Chang-Seok Choi, Hanho Lee. ieiceee, 5(10):374-380, 2008. [doi]
- High-Speed Two-Parallel Concatenated BCH-Based Super-FEC Architecture for Optical CommunicationsSangho Yoon, Hanho Lee, Kihoon Lee. ieicet, 93-A(4):769-777, 2010. [doi]