A 450ps Access-Time SRAM Macro in 45nm SOI Featuring a Two-Stage Sensing-Scheme and Dynamic Power Management

Harold Pilo, Vaidyanathan Ramadurai, Geordie Braceras, John Gabric, Steve Lamphier, Yue Tan. A 450ps Access-Time SRAM Macro in 45nm SOI Featuring a Two-Stage Sensing-Scheme and Dynamic Power Management. In 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008. pages 378-379, IEEE, 2008. [doi]

Authors

Harold Pilo

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Vaidyanathan Ramadurai

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Geordie Braceras

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John Gabric

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Steve Lamphier

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Yue Tan

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