A layout synthesis methodology for array-type analog blocks

Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen. A layout synthesis methodology for array-type analog blocks. IEEE Trans. on CAD of Integrated Circuits and Systems, 21(6):645-661, 2002. [doi]

Authors

Geert Van der Plas

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Jan Vandenbussche

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Georges G. E. Gielen

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Willy M. C. Sansen

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