Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen. A layout synthesis methodology for array-type analog blocks. IEEE Trans. on CAD of Integrated Circuits and Systems, 21(6):645-661, 2002. [doi]
@article{PlasVGS02,
title = {A layout synthesis methodology for array-type analog blocks},
author = {Geert Van der Plas and Jan Vandenbussche and Georges G. E. Gielen and Willy M. C. Sansen},
year = {2002},
doi = {10.1109/TCAD.2002.1004309},
url = {http://doi.ieeecomputersociety.org/10.1109/TCAD.2002.1004309},
tags = {layout, C++},
researchr = {https://researchr.org/publication/PlasVGS02},
cites = {0},
citedby = {0},
journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
volume = {21},
number = {6},
pages = {645-661},
}