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Irith Pomeranz. Dummy Faulty Units for Reduced Fail Data Volume From Logic Faults. IEEE Trans. VLSI Syst., 31(11):1754-1762, November 2023. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Hybrid Pass/Fail and Full Fail Data for Reduced Fail Data VolumeIrith Pomeranz, M. Enamul Amyeen. tcad, 40(8):1711-1720, 2021. [doi] Compaction of a Transparent-Scan Sequence to Reduce the Fail Data Volume for Scan Chain FaultsIrith Pomeranz. ats 2017: 133-138 [doi]
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