Junius Pun, Xilai Dai, Grace Zgheib, Mahesh A. Iyer, Andrew Boutros, Vaughn Betz, Mohamed S. Abdelfattah. Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage. In 35th International Conference on Field-Programmable Logic and Applications, FPL 2025, Leiden, The Netherlands, September 1-5, 2025. pages 27-36, IEEE, 2025. [doi]
Abstract is missing.