Logic BIST Architecture for System-Level Test and Diagnosis

Jun Qian, Xingang Wang, Qinfu Yang, Fei Zhuang, Junbo Jia, Xiangfeng Li, Yuan Zuo, Jayanth Mekkoth, Jinsong Liu, Hao-Jan Chao, Shianling Wu, Huafeng Yang, Lizhen Yu, Feifei Zhao, Laung-Terng Wang. Logic BIST Architecture for System-Level Test and Diagnosis. In Proceedings of the Eighteentgh Asian Test Symposium, ATS 2009, 23-26 November 2009, Taichung, Taiwan. pages 21-26, IEEE Computer Society, 2009. [doi]

Authors

Jun Qian

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Xingang Wang

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Qinfu Yang

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Fei Zhuang

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Junbo Jia

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Xiangfeng Li

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Yuan Zuo

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Jayanth Mekkoth

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Jinsong Liu

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Hao-Jan Chao

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Shianling Wu

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Huafeng Yang

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Lizhen Yu

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Feifei Zhao

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Laung-Terng Wang

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