Logic BIST Architecture for System-Level Test and Diagnosis

Jun Qian, Xingang Wang, Qinfu Yang, Fei Zhuang, Junbo Jia, Xiangfeng Li, Yuan Zuo, Jayanth Mekkoth, Jinsong Liu, Hao-Jan Chao, Shianling Wu, Huafeng Yang, Lizhen Yu, Feifei Zhao, Laung-Terng Wang. Logic BIST Architecture for System-Level Test and Diagnosis. In Proceedings of the Eighteentgh Asian Test Symposium, ATS 2009, 23-26 November 2009, Taichung, Taiwan. pages 21-26, IEEE Computer Society, 2009. [doi]

Abstract

Abstract is missing.