Hafizur Rahaman, Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan. VLSI Architecture for Bit Parallel Systolic Multipliers for Special Class of GF(2 m )Using Dual Bases. In Hafizur Rahaman, Sanatan Chattopadhyay, Santanu Chattopadhyay, editors, Progress in VLSI Design and Test - 16th International Symposium, VDAT 2012, Shibpur, India, July 1-4, 2012. Proceedings. Volume 7373 of Lecture Notes in Computer Science, pages 258-269, Springer, 2012. [doi]
Abstract is missing.