Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models

Mukesh Ranjan, Wim Verhaegen, Anuradha Agarwal, Hemanth Sampath, Ranga Vemuri, Georges G. E. Gielen. Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models. In 2004 Design, Automation and Test in Europe Conference and Exposition (DATE 2004), 16-20 February 2004, Paris, France. pages 604-609, IEEE Computer Society, 2004. [doi]

Authors

Mukesh Ranjan

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Wim Verhaegen

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Anuradha Agarwal

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Hemanth Sampath

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Ranga Vemuri

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Georges G. E. Gielen

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