A 6.9 ns, 560 macrocell, in system programmable, CMOS PLD with 3.3-5 volt I/O capability - researchr publication related

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Dirk Reese, Eric Chun, Sammy Cheung, Edmond Lau, Michael Chu, Gwen Liang, Nghia Van Tran, Brad Vest, Richard Smolen, Minchang Liang, Seshan Sekariapuram, Behzad Nouban, Myron Wong, John Costello, John Turner. A 6.9 ns, 560 macrocell, in system programmable, CMOS PLD with 3.3-5 volt I/O capability. In Proceedings of the IEEE 1998 Custom Integrated Circuits Conference, CICC 1998, Santa Clara, CA, USA, May 11-14, 1998. pages 265-268, IEEE, 1998. [doi]

The following publications are possibly variants of this publication:

A 4.9 ns, 3.3 volt, 512 macrocell, CMOS PLD with hot socket protection and fast in system programmingBrad Vest, Gwen Liang, Mark Chan, Eric Chun, Mark Fiester, Weiying Ding, Edmond Lau, Guu Lin, Behzad Nouban, Dirk Reese, Mian Smith, Nghia Tran, Stephanie Wong, Michael Woo, Myron Wong, John Costello. cicc 1999: 187-190 [doi]

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