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Philippe Royannez, Amara Amara. A 1.0ns 64-bits GaAs Adder using Quad tree algorithm. In 6th Great Lakes Symposium on VLSI (GLS-VLSI 96), March 22-23, 1996, Ames, IA, USA. pages 24-28, IEEE Computer Society, 1996. [doi]
Abstract is missing.