A Novel Hierarchical Circuit LUT Model for SOI Technology for Rapid Prototyping - researchr publication authors

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Sitansusekhar Roymohapatra, Ganesh R. Gore, Akanksha Yadav, Mahesh B. Patil, Krishnan S. Rengarajan, Subramanian S. Iyer, Maryam Shojaei Baghini. A Novel Hierarchical Circuit LUT Model for SOI Technology for Rapid Prototyping. IEEE Trans. on CAD of Integrated Circuits and Systems, 39(5):1073-1083, 2020. [doi]

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