A Novel Hierarchical Circuit LUT Model for SOI Technology for Rapid Prototyping

Sitansusekhar Roymohapatra, Ganesh R. Gore, Akanksha Yadav, Mahesh B. Patil, Krishnan S. Rengarajan, Subramanian S. Iyer, Maryam Shojaei Baghini. A Novel Hierarchical Circuit LUT Model for SOI Technology for Rapid Prototyping. IEEE Trans. on CAD of Integrated Circuits and Systems, 39(5):1073-1083, 2020. [doi]

Abstract

Abstract is missing.