Two-dimensional power-line selection scheme for low subthreshold-current multi-gigabit DRAM's

Takeshi Sakata, Kiyoo Itoh 0001, Masashi Horiguchi, Masakazu Aoki. Two-dimensional power-line selection scheme for low subthreshold-current multi-gigabit DRAM's. J. Solid-State Circuits, 29(8):887-894, August 1994. [doi]

Abstract

Abstract is missing.