Takahiro Sasaki, Yuji Ichikawa, Tetsuo Hironaka, Toshiaki Kitamura, Toshio Kondo. Evaluation of low-energy and high-performance processor using variable stages pipeline technique. IET Computers & Digital Techniques, 2(3):230-238, 2008. [doi]
@article{SasakiIHKK08,
title = {Evaluation of low-energy and high-performance processor using variable stages pipeline technique},
author = {Takahiro Sasaki and Yuji Ichikawa and Tetsuo Hironaka and Toshiaki Kitamura and Toshio Kondo},
year = {2008},
doi = {10.1049/iet-cdt:20070130},
url = {http://dx.doi.org/10.1049/iet-cdt:20070130},
researchr = {https://researchr.org/publication/SasakiIHKK08},
cites = {0},
citedby = {0},
journal = {IET Computers & Digital Techniques},
volume = {2},
number = {3},
pages = {230-238},
}