Logic Design Verification Using Automated Test Generation - researchr publication authors

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Tohru Sasaki, Shunichi Kato, Nobuyoshi Nomizu, Hidetoshi Tanaka. Logic Design Verification Using Automated Test Generation. In Proceedings International Test Conference 1984, Philadelphia, PA, USA, October 1984. pages 88-95, IEEE Computer Society, 1984.

This author has not been identified. Look up 'Tohru Sasaki' in GoogleThis author has not been identified. Look up 'Shunichi Kato' in GoogleThis author has not been identified. Look up 'Nobuyoshi Nomizu' in GoogleThis author has not been identified. Look up 'Hidetoshi Tanaka' in Google

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