Logic Design Verification Using Automated Test Generation - researchr publication

researchr

You are not signed in
Sign in
Sign up

Tohru Sasaki, Shunichi Kato, Nobuyoshi Nomizu, Hidetoshi Tanaka. Logic Design Verification Using Automated Test Generation. In Proceedings International Test Conference 1984, Philadelphia, PA, USA, October 1984. pages 88-95, IEEE Computer Society, 1984.

Abstract is missing.

runs on WebDSL