Tohru Sasaki - researchr alias

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Viewing Publication 1 - 16 from 16

2021

Surrounding Structure Estimation Using Ambient LightBilal Ahmed Mir, Tohru Sasaki, Yusuke Nagahata, Eri Yamabe, Naoya Miwa, Kenji Terabayashi. ijat, 15(6):794-803, 2021. [doi]

2020

Network Connectivity Control of Mobile Robots by Fast Position Estimations and Laplacian KernelYusuke Ikemoto, Kenichiro Nishimura, Yuichiro Mizutama, Tohru Sasaki, Mitsuru Jindai. jrm, 32(2):422-436, 2020. [doi]

Hydraulic Micro Device with Force Sensing for Measurement of Mechanical CharacteristicsTohru Sasaki, Yudai Fujiwara, Kaoru Tachikawa, Kenji Terabayashi, Kuniaki Dohda. ijat, 14(4):625-632, 2020. [doi]

2019

Hug Behavior Request Model with Approaching Human for Hug RobotsMitsuru Jindai, Shunsuke Ota, Toshiyuki Yasuda, Tohru Sasaki. socrob 2019: 247-255 [doi]

2018

Position and Posture Measurement Method of the Omnidirectional Camera Using Identification MarkersNaoya Hatakeyama, Tohru Sasaki, Kenji Terabayashi, Masahiro Funato, Mitsuru Jindai. jrm, 30(3):354-362, 2018. [doi]

2017

Development of a hug request motion model during active approach to humanMitsuru Jindai, Shunsuke Ota, Toshiyuki Yasuda, Tohru Sasaki, Yoshihiro Sejima. SMC 2017: 612-617 [doi]

2015

Handshake request motion model with an approaching human for a handshake robot systemMitsuru Jindai, Shunsuke Ota, Yusuke Ikemoto, Tohru Sasaki. ram 2015: [doi]

Handshake response motion model with approaching of human based on an analysis of human handshake motionsShunsuke Ota, Mitsuru Jindai, Tohru Sasaki, Yusuke Ikemoto. icumt 2015: 8-13 [doi]

2008

Motion Characteristics of Loop Type Elliptic ResonatorTohru Sasaki, Kunio Koizumi, Motofumi Sasaki. jrm, 20(1):61-67, 2008. [doi]

1987

Block-Level Hardware Logic Simulation MachineShigeru Takasaki, Tohru Sasaki, Nobuyoshi Nomizu, Nobuhiko Koike, Kenji Ohmori. tcad, 6(1):46-54, 1987. [doi]

1986

HAL II: a mixed level hardware logic simulation systemShigeru Takasaki, Tohru Sasaki, Nobuyoshi Nomizu, Hiroshi Ishikura, Nobuhiko Koike. dac 1986: 581-587 [doi]

1985

HAL: A High-Speed Logic Simulation MachineNobuhiko Koike, Kenji Ohmori, Tohru Sasaki. dt, 2(5):61-73, 1985. [doi]

1984

Logic Design Verification Using Automated Test GenerationTohru Sasaki, Shunichi Kato, Nobuyoshi Nomizu, Hidetoshi Tanaka. itc 1984: 88-95

1983

HAL: A block level HArdware Logic simulatorTohru Sasaki, Nobuhiko Koike, Kenji Ohmori, Kyoji Tomita. dac 1983: 150-156 [doi]

1981

Hierarchical design verification for large digital systemsTohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato. dac 1981: 105-112 [doi]

1980

MIXS: A mixed level simulator for large digital system logic verificationTohru Sasaki, Akihiko Yamada, Shunichi Kato, Terufumi Nakazawa, Kyoji Tomita, Nobuyoshi Nomizu. dac 1980: 626-633 [doi]

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