Hierarchical design verification for large digital systems

Tohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato. Hierarchical design verification for large digital systems. In Robert J. Smith II, editor, Proceedings of the 18th Design Automation Conference, DAC '81, Nashville, Tennessee, USA, June 29 - July 1, 1981. pages 105-112, ACM/IEEE, 1981. [doi]

Abstract

Abstract is missing.