Hierarchical design verification for large digital systems

Tohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato. Hierarchical design verification for large digital systems. In Robert J. Smith II, editor, Proceedings of the 18th Design Automation Conference, DAC '81, Nashville, Tennessee, USA, June 29 - July 1, 1981. pages 105-112, ACM/IEEE, 1981. [doi]

@inproceedings{SasakiYAHKS81,
  title = {Hierarchical design verification for large digital systems},
  author = {Tohru Sasaki and Akihiko Yamada and Toshinori Aoyama and Katsutoshi Hasegawa and Shunichi Kato and Shinichi Sato},
  year = {1981},
  url = {http://dl.acm.org/citation.cfm?id=802287},
  researchr = {https://researchr.org/publication/SasakiYAHKS81},
  cites = {0},
  citedby = {0},
  pages = {105-112},
  booktitle = {Proceedings of the 18th Design Automation Conference, DAC '81, Nashville, Tennessee, USA, June 29 - July 1, 1981},
  editor = {Robert J. Smith II},
  publisher = {ACM/IEEE},
}