4-Gb/s track and hold circuit using parasitic capacitance canceller [flash ADC application]

Takahide Sato, Shigetaka Takagi, Nobuo Fujii, Yasuyuki Hashimoto, Kohji Sakata, Hirovuki Okada. 4-Gb/s track and hold circuit using parasitic capacitance canceller [flash ADC application]. In Michiel Steyaert, C. L. Claeys, editors, 33rd European Solid-State Circuits Conference, ESSCIRC 2004, Leuven, Belgium, September 21-23, 2004. pages 347-350, IEEE, 2004. [doi]

Authors

Takahide Sato

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Shigetaka Takagi

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Nobuo Fujii

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Yasuyuki Hashimoto

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Kohji Sakata

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Hirovuki Okada

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