Design planning for high-performance ASICs

John Y. Sayah, Rajesh Gupta, Deepak D. Sherlekar, Philip S. Honsinger, Jitendra M. Apte, S. Wayne Bollinger, Hai Hsia Chen, Sumit Dasgupta, Edward P. Hsieh, Andrew D. Huber, Edward J. Hughes, Zahi M. Kurzum, Vasant B. Rao, Thepthai Tabtieng, Vigen Valijan, David Y. Yang. Design planning for high-performance ASICs. IBM Journal of Research and Development, 40(4):431-452, 1996. [doi]

Authors

John Y. Sayah

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Rajesh Gupta

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Deepak D. Sherlekar

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Philip S. Honsinger

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Jitendra M. Apte

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S. Wayne Bollinger

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Hai Hsia Chen

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Sumit Dasgupta

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Edward P. Hsieh

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Andrew D. Huber

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Edward J. Hughes

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Zahi M. Kurzum

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Vasant B. Rao

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Thepthai Tabtieng

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Vigen Valijan

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David Y. Yang

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