The following publications are possibly variants of this publication:
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- Simultaneous exploration of optimal datapath and loop based high level transformation during area-delay tradeoff in architectural synthesis using swarm intelligenceAnirban Sengupta, Vipul Kumar Mishra. kes, 19(1):47-61, 2015. [doi]
- Bacterial foraging driven exploration of multi cycle fault tolerant datapath based on power-performance tradeoff in high level synthesisAnirban Sengupta, Saumya Bhadauria. eswa, 42(10):4719-4732, 2015. [doi]
- Automated design space exploration of transient fault detectable datapath based on user specified power and delay constraintsAnirban Sengupta, Saumya Bhadauria. vlsi-dat 2015: 1-4 [doi]
- Error Masking of Transient Faults: Exploration of a Fault Tolerant Datapath Based on User Specified Power and Delay BudgetAnirban Sengupta, Saumya Bhadauria. cit 2014: 345-350 [doi]
- Untrusted Third Party Digital IP Cores: Power-Delay Trade-off Driven Exploration of Hardware Trojan Secured Datapath during High Level SynthesisAnirban Sengupta, Saumya Bhadauria. glvlsi 2015: 167-172 [doi]
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- Automated design space exploration of multi-cycle transient fault detectable datapath based on multi-objective user constraints for application specific computingAnirban Sengupta, Saumya Bhadauria. aes, 82:14-24, 2015. [doi]