On-chip MISR Compaction Technique to Reduce Diagnostic Effort and Test Time - researchr publication

researchr

You are not signed in
Sign in
Sign up

Jaidev Shenoy, Kelly A. Ockunzzi, Virendra Singh, Kushal Kamal. On-chip MISR Compaction Technique to Reduce Diagnostic Effort and Test Time. In 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems, VLSID 2019, Delhi, India, January 5-9, 2019. pages 106-111, IEEE, 2019. [doi]

Abstract is missing.

runs on WebDSL