Kota Shinohara, Mihoko Hidaka, Jing Li, Qing Dong, Bo Yang, Shigetoshi Nakatake. Layout-aware variation evaluation of analog circuits and its validity on op-amp designs. In David Atienza, Yuan Xie, José L. Ayala, Ken S. Stevens, editors, Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, Lausanne, Switzerland, May 2-6, 2011. pages 247-252, ACM, 2011. [doi]
Abstract is missing.