A Floating Point Divider using Redundant Binary Circuits and an Asynchronous Clock Scheme

Hiroaki Suzuki, Hiroshi Makino, Koichiro Mashiko, Hisanori Hamano. A Floating Point Divider using Redundant Binary Circuits and an Asynchronous Clock Scheme. In ICCD. pages 685-689, 1997.

Abstract

Abstract is missing.